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期刊
ISSN
1350-2387
刊名
IEE Proceedings
参考译名
英国电气工程师学会论文集:计算机与数字技术
收藏年代
1999~2006
关联期刊
参考译名
收藏年代
IET Computers & Digital Techniques
IET计算机与数字技术
2007~2012
全部
1999
2000
2001
2002
2003
2004
2005
2006
2005, vol.152, no.1
2005, vol.152, no.2
2005, vol.152, no.3
2005, vol.152, no.4
2005, vol.152, no.5
2005, vol.152, no.6
题名
作者
出版年
年卷期
Delay bounds based constraint distribution method
A. Verle; X. Michel; P. Maurine; N. Azemard; D. Auvergne
2005
2005, vol.152, no.6
Switching activity reduction in embedded systems: a genetic bus encoding approach
G. Ascia; V. Catania; M. Palesi; A. Parlato
2005
2005, vol.152, no.6
Leakage current aware high-level estimation for VLSI circuits
F. Li; L. He; J. M. Basile; R. Patel; H. Ramamurthy
2005
2005, vol.152, no.6
Reducing power dissipation of register alias tables in high-performance processors
G. Kucuk; O. Ergin; D. Ponomarev; K. Ghose
2005
2005, vol.152, no.6
Enhancing behavioural-level design flows with statistical power estimation capabilities
B. Arts; L. Benini; N. van der Eng; M. Heijligers; A. Kenter; E. Macii; H. Munk; F. Theeuwen
2005
2005, vol.152, no.6
RTL power estimation in an HDL-based design flow
M. Bruno; A. Macii; M. Poncino
2005
2005, vol.152, no.6
Test generation for embedded circuits under the transparent-scan approach
I. Pomeranz; S. M. Reddy
2005
2005, vol.152, no.6
Three-stage compression approach to reduce test data volume and testing time for IP cores in SOCs
L. Li; K. Chakrabarty; S. Kajihara; S. Swaminathan
2005
2005, vol.152, no.6
Adder methodology and design using probabilistic multiple carry estimates
E. M. Ashmila; S. S. Dlay; O. R. Hinton
2005
2005, vol.152, no.6
Communication and task scheduling of application-specific networks-on-chip
J. Hu; R. Marculescu
2005
2005, vol.152, no.5
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