期刊


ISSN1350-2387
刊名IEE Proceedings
参考译名英国电气工程师学会论文集:计算机与数字技术
收藏年代1999~2006

关联期刊参考译名收藏年代
IET Computers & Digital TechniquesIET计算机与数字技术2007~2012


全部

1999 2000 2001 2002 2003 2004
2005 2006

2005, vol.152, no.1 2005, vol.152, no.2 2005, vol.152, no.3 2005, vol.152, no.4 2005, vol.152, no.5 2005, vol.152, no.6

题名作者出版年年卷期
Delay bounds based constraint distribution methodA. Verle; X. Michel; P. Maurine; N. Azemard; D. Auvergne20052005, vol.152, no.6
Switching activity reduction in embedded systems: a genetic bus encoding approachG. Ascia; V. Catania; M. Palesi; A. Parlato20052005, vol.152, no.6
Leakage current aware high-level estimation for VLSI circuitsF. Li; L. He; J. M. Basile; R. Patel; H. Ramamurthy20052005, vol.152, no.6
Reducing power dissipation of register alias tables in high-performance processorsG. Kucuk; O. Ergin; D. Ponomarev; K. Ghose20052005, vol.152, no.6
Enhancing behavioural-level design flows with statistical power estimation capabilitiesB. Arts; L. Benini; N. van der Eng; M. Heijligers; A. Kenter; E. Macii; H. Munk; F. Theeuwen20052005, vol.152, no.6
RTL power estimation in an HDL-based design flowM. Bruno; A. Macii; M. Poncino20052005, vol.152, no.6
Test generation for embedded circuits under the transparent-scan approachI. Pomeranz; S. M. Reddy20052005, vol.152, no.6
Three-stage compression approach to reduce test data volume and testing time for IP cores in SOCsL. Li; K. Chakrabarty; S. Kajihara; S. Swaminathan20052005, vol.152, no.6
Adder methodology and design using probabilistic multiple carry estimatesE. M. Ashmila; S. S. Dlay; O. R. Hinton20052005, vol.152, no.6
Communication and task scheduling of application-specific networks-on-chipJ. Hu; R. Marculescu20052005, vol.152, no.5
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