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期刊
ISSN
1546-1998
刊名
Journal of Low Power Electronics
参考译名
低功耗电子学杂志
收藏年代
2006~2019
全部
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2011, vol.7, no.1
2011, vol.7, no.2
2011, vol.7, no.3
2011, vol.7, no.4
题名
作者
出版年
年卷期
Test Power Reduction via Deterministic Alignment of Stimulus and Response Bits
Sobeeh Almukhaizim; Eman AlQuraishi; Ozgur Sinanoglu
2011
2011, vol.7, no.4
On-Line BIST for Performance Failure Prediction Under NBTI-Induced Aging in Safety-Critical Applications
R. S. Oliveira; J. Semiao; I. C. Teixeira; M. B. Santos; J. P. Teixeira
2011
2011, vol.7, no.4
Power-Efficient Application of Sleep Transistors to Enhance the Reliability of Integrated Circuits
Claas Cornelius; Frank Sill Torres; Dirk Timmermann
2011
2011, vol.7, no.4
Inclusion of Power Consumption Information in High-Level Modeling of Linear Analog Blocks
Laurent Bousquet; Fabio Cenni; Emmanuel Simeu
2011
2011, vol.7, no.4
Studying the Influence of Chip Temperatures on Timing Integrity Using Improved Power Modeling
Andras Timar; Marta Rencz
2011
2011, vol.7, no.4
Analyzing and Improving Performance and Energy Efficiency of Android
Tapas Kumar Kundu; Kolin Paul
2011
2011, vol.7, no.4
Design Techniques with Multiple Scan Compression CoDecs for Low Power and High Quality Scan Test
Arvind Jain; Sundarrajan Subramanian; Rubin A. Parekhji; Srivaths Ravi
2011
2011, vol.7, no.4
Trading Accuracy for Power in a Multiplier Architecture
Parag Kulkarni; Puneet Gupta; Milos D. Ercegovac
2011
2011, vol.7, no.4
A Polynomial Based Approach to Wakeup Time and Energy Estimation in Power-Gated Logic Clusters
Vivek D. Tovinakere; Olivier Sentieys; Steven Derrien
2011
2011, vol.7, no.4
A Variation-Aware Taylor Expansion Diagram-Based Approach for Nano-CMOS Register-Transfer Level Leakage Optimization
Shibaji Banerjee; Jimson Mathew; Saraju P. Mohanty; Dhiraj K. Pradhan; Maciej J. Ciesielski
2011
2011, vol.7, no.4
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