期刊


ISSN0741-3106
刊名IEEE Electron Device Letters
参考译名IEEE电子器件快报
收藏年代1998～2007



全部

1998 1999 2000 2001 2002 2003
2004 2005 2006 2007

1998, vol.19, no.1 1998, vol.19, no.10 1998, vol.19, no.11 1998, vol.19, no.12 1998, vol.19, no.2 1998, vol.19, no.3
1998, vol.19, no.4 1998, vol.19, no.5 1998, vol.19, no.6 1998, vol.19, no.7 1998, vol.19, no.8 1998, vol.19, no.9

题名作者出版年年卷期
0.35-μm Asymmetric and symmetric LDD device comparison using a reliability/speed/power methodologyJ. F. Chen; J. Tao; P. Fang; C. Hu19981998, vol.19, no.7
4H-SiC MOSFET's utilizing the H2 surface cleaning techniqueKatsunori Ueno; Ryuichi Asai; Takashi Tsuji19981998, vol.19, no.7
A Ku-band T-shaped gate GaAs power MESFET with high breakdown voltage for satellite communicationsJong-Lam Lee; Haecheon Kim; Jae Kyoung Mun; Sung-Jae Maeng19981998, vol.19, no.7
A new SONOS memory using source-side injection for programmingKuo-Tung Chang; Wei-Ming Chen; Craig Swift; Jack M. Higman; Wayne M. Paulson; Ko-Min Chang19981998, vol.19, no.7
A new technique for determining long-term TDDB acceleration parameters of thin gate oxidesY. Chen; J. S. Suehle; C. -C. Shen; J. B. Bernstein; C. Messick; P. Chaparala19981998, vol.19, no.7
A novel process to form cobalt silicided p+ poly-Si gates by BF2+ implantation into bilayered CoSi/a-Si films and subsequent annealW. K. Lai; H. W. Liu; M. H. Juang; N. C. Chen; H. C. Cheng;19981998, vol.19, no.7
A possible mechanism for reconciling large gate-drain overlap capacitance with a small difference between polysilicon gate length and effective channel length in an advanced technology PFETR. Young; L. Su; M. Ieong; S. Kapur19981998, vol.19, no.7
Gas detector with low-cost micromachined field ionization tipsB. Ghodsian; M. Parameswaran; M. Syrzycki19981998, vol.19, no.7
Gate current and oxide reliability in p+ poly MOS capacitors with poly-Si and poly-Ge0.3Si0.7 gate materialC. Salm; J. H. Klootwijk; Y. Ponomarev; P. W. M. Boos; D. J. Gravesteijn; P. H. Woerlee19981998, vol.19, no.7
High-frequency performances of a partially deleted 0.18-μm SOI/CMOS technology at low supply voltage -- influence of parasitic elementsV. Ferlet-Cavrois; C. Marcandella; O. Musseau; J. L. Leray; J. L. Pelloie; F. Martin; S. Kolev19981998, vol.19, no.7
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