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期刊
ISSN
0923-8174
刊名
Journal of Electronic Testing
参考译名
电子测试杂志:理论与应用
收藏年代
2000~2025
全部
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2000, vol.16, no.1-2
2000, vol.16, no.3
2000, vol.16, no.4
2000, vol.16, no.5
2000, vol.16, no.6
题名
作者
出版年
年卷期
A biased random instruction generation environment for architectural verification of pipelined processors
Ta-Chung Chang; Vikram Iyengar; Elizabeth M. Rudnick
2000
2000, vol.16, no.1-2
A buffer-oriented methodology for microarchitecture validation
Noppanunt Utamaphethai; R. D. (Shawn) Blanton; John Paul Shen
2000
2000, vol.16, no.1-2
An efficient logic equivalence checker for industrial circuits
Jaehong Park; Carl Pixley; Michael Burns; Hyunwoo Cho;
2000
2000, vol.16, no.1-2
An RTL abstraction technique for processor microarchitecture validation and test generation
Jian Shen; Jacob A. Abraham
2000
2000, vol.16, no.1-2
Automatic vector generation using constraints and biasing
Jun Yuan; Kurt Shultz; Carl Pixley; Hillel Miller; Adnan Aziz
2000
2000, vol.16, no.1-2
Formal value-range and variable testability techniques for high-level design-for-testability
Sandhya Seshadri; Michael S. Hsiao
2000
2000, vol.16, no.1-2
On efficiently producing quality tests for custom circuits in PowerPC microprocessors
Li-C. Wang; Magdy S. Abadir
2000
2000, vol.16, no.1-2
Oscillation ring delay test for high performance microprocessors
Wen Ching Wu; Chung Len Lee; Ming Shae Wu; Jwu E. Chen; Magdy S. Abadir
2000
2000, vol.16, no.1-2
Testing for function and performance: towards an integrated processor validation methodology
Pradip Bose
2000
2000, vol.16, no.1-2
Verification simulation acceleration using code-perturbation
Byeong Min; Gwan Choi
2000
2000, vol.16, no.1-2
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