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期刊
ISSN
0923-8174
刊名
Journal of Electronic Testing
参考译名
电子测试杂志:理论与应用
收藏年代
2000~2024
全部
2000
2001
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2003
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2000, vol.16, no.1-2
2000, vol.16, no.3
2000, vol.16, no.4
2000, vol.16, no.5
2000, vol.16, no.6
题名
作者
出版年
年卷期
A non-scan approach to DFT for controllers achieving 100% fault efficiency
Satoshi Ohtake; Toshimitsu Masuzawa; Hideo Fujiwara
2000
2000, vol.16, no.5
A practical vector restoration technique for large sequential circuits
Surendra K. Bommu; Kiran B. Doreswamy; Srimat T. Chakradhar
2000
2000, vol.16, no.5
Algorithms to select IDDQ measurement vectors for bridging faults in sequential circuits
Yoshinobu Higami; Yuzo Takamatsu; Kewal K. Saluja; Kozo Kinoshita
2000
2000, vol.16, no.5
BIST TPG for combinational cluster interconnect testing at board level
Chen-Huan Chiang; Sandeep K. Gupta
2000
2000, vol.16, no.5
Dynamic power supply current testing of CMOS SRAMs
Jian Liu; Rafic Z. Makki; Ayman Kayssi
2000
2000, vol.16, no.5
False-path removal using delay fault simulation
Marwan A. Gharaybeh; Vishwani D. Agrawal; Michael L. Bushnell; Carlos G. Parodi
2000
2000, vol.16, no.5
I{sub}(DDQ) testing of submicron CMOS--by cooling?
M. Rencz; V. Szekely; S. Torok; K. Torki; B. Courtois
2000
2000, vol.16, no.5
LFSR-based deterministic TPG for two-pattern testing
Xiaowei Li; Paul Y. S. Cheung; Hideo Fujiwara
2000
2000, vol.16, no.5
Reduction of number of paths to be tested in delay testing
Huawei Li; Zhongcheng Li; Yinghua Min
2000
2000, vol.16, no.5
Static test compaction for scan-based designs to reduce test application time
Irith Pomeranz; Sudhakar M. Reddy
2000
2000, vol.16, no.5
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