期刊


ISSN0923-8174
刊名Journal of Electronic Testing
参考译名电子测试杂志：理论与应用
收藏年代2000～2023



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2016, vol.32, no.1 2016, vol.32, no.2 2016, vol.32, no.3 2016, vol.32, no.4 2016, vol.32, no.5 2016, vol.32, no.6

题名作者出版年年卷期
An SEU-Resilient SRAM Bitcell in 65-nm CMOS TechnologyChen, Qingyu; Wang, Haibin; Chen, Li; Li, Lixiang; Zhao, Xing; Liu, Rui; Chen, Mo; Li, Xuantian20162016, vol.32, no.3
UntitledAgrawal, Vishwani D.20162016, vol.32, no.3
Optimization of Boundary Scan Tests Using FPGA-Based Efficient Scan ArchitecturesAleksejev, Igor; Devadze, Sergei; Jutman, Artur; Shibin, Konstantin20162016, vol.32, no.3
Dynamic Power Integrity Control of ATE for Eliminating Overkills and Underkills in Device TestingIshida, Masahiro; Nakura, Toru; Kusaka, Takashi; Komatsu, Satoshi; Asada, Kunihiro20162016, vol.32, no.3
Identification and Rejuvenation of NBTI-Critical Logic Paths in Nanoscale CircuitsJenihhin, Maksim; Squillero, Giovanni; Copetti, Thiago Santos; Tihhomirov, Valentin; Kostin, Sergei; Gaudesi, Marco; Vargas, Fabian; Raik, Jaan; Reorda, Matteo Sonza; Poehls, Leticia Bolzani; Ubar, Raimund; Medeiros, Guilherme Cardoso20162016, vol.32, no.3
A Fast Statistical Soft Error Rate Estimation Method for Nano-scale Combinational CircuitsRaji, Mohsen; Ghavami, Behnam20162016, vol.32, no.3
Impact of Fin-Height on SRAM Soft Error Sensitivity and Cell StabilityVillacorta, Hector; Segura, Jaume; Champac, Victor20162016, vol.32, no.3
NBTI-Aware Design of Integrated Circuits: A Hardware-Based Approach for Increasing Circuits' Life TimeCopetti, T.; Medeiros, G. Cardoso; Poehls, L. Bolzani; Vargas, F.20162016, vol.32, no.3
Security Path: An Emerging Design Methodology to Protect the FPGA IPs Against Passive/Active Design TamperingZamanzadeh, Sharareh; Jahanian, Ali20162016, vol.32, no.3
Side-Channel Information Characterisation Based on Cascade-Forward Back-Propagation Neural NetworkSaeedi, Ehsan; Hossain, Md Selim; Kong, Yinan20162016, vol.32, no.3
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