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期刊
ISSN
0923-8174
刊名
Journal of Electronic Testing
参考译名
电子测试杂志:理论与应用
收藏年代
2000~2024
全部
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2005, vol.21, no.1
2005, vol.21, no.2
2005, vol.21, no.3
2005, vol.21, no.4
2005, vol.21, no.5
2005, vol.21, no.6
题名
作者
出版年
年卷期
Abort-on-Fail Based Test Scheduling
ERIK LARSSON; JULIEN POUGET; ZEBO PENG
2005
2005, vol.21, no.6
The Coupling Model for Function and Delay Faults
JOONHWAN YI; JOHN P. HAYES
2005
2005, vol.21, no.6
A Realistic Timing Test Model and Its Applications in High-Speed Interconnect Devices
BAOSHENG WANG; ANDY KUO; TOURAJ FARAHMAND; ANDRE IVANOV; YONG B. CHO; SASSAN TABATABAEI
2005
2005, vol.21, no.6
Reducing Scan Shifts Using Configurations of Compatible and Folding Scan Trees
H. YOTSUYANAGI; T. KUCHII; S. NISHIKAWA; M. HASHIZUME; K. KINOSHITA
2005
2005, vol.21, no.6
Multiple-Constraint Driven System-on-Chip Test Time Optimization
JULIEN POUGET; ERIK LARSSON; ZEBO PENG
2005
2005, vol.21, no.6
Fault Detection in Switched Current Circuits Using Built-in Transient Current Sensors
Y. LECHUGA; R. MOZUELOS; M. A. ALLENDE; M. MARTINEZ; S. BRACHO
2005
2005, vol.21, no.6
Low-Cost Testing of 5 GHz Low Noise Amplifiers Using New RF BIST Circuit
JEE-YOUL RYU; BRUCE C. KIM
2005
2005, vol.21, no.6
Efficient March Test Procedure for Dynamic Read Destructive Fault Detection in SRAM Memories
LUIGI DILILLO; PATRICK GIRARD; SERGE PRAVOSSOUDOVITCH; ARNAUD VIRAZEL; SIMONE BORRI; MAGALI HAGE-HASSAN; C. Landrault
2005
2005, vol.21, no.5
Concurrent Error Detection in a Bit-Parallel Systolic Multiplier for Dual Basis of GF(2{sup}m)
CHIOU-YNG LEE; CHE WUN CHIOU; JIM-MIN LIN; H. J. Wunderlich
2005
2005, vol.21, no.5
A Formal Approach to On-Line Monitoring of Digital VLSI Circuits: Theory, Design and Implementation
SANTOSH BISWAS; SIDDHARTHA MUKHOPADHYAY; AMIT PATRA; N. K. Jha
2005
2005, vol.21, no.5
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